3D Stacked Chips by Ibrahim (Abe) M. Elfadel & Gerhard Fettweis

Author:Ibrahim (Abe) M. Elfadel & Gerhard Fettweis
Language: eng
Format: epub
Publisher: Springer International Publishing, Cham

Next we explain how the PTAT current is generated and how it helps compensate for the error introduced due to process variations in β. Consider the simplified circuit shown in Fig. 8.7 where the voltage at node ‘X’ can be written as:

(8.6)

Similarly, the potential at node ‘Y ’ is given as:

(8.7)

where I B3 is the base current of Q3 and can be written in terms of the emitter current as . We note that since I E3 is n × I BIAS, we can then rewrite V Y as:

(8.8)

The low input referred noise OpAmp forces nodes ‘X’ and ‘Y ’ to be at equal potential, a necessary condition for generating a PTAT current. So V X  = V Y and we obtain:

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